BMDs Can Delay the Use of Theorem Proving for Verifying Arithmetic Assembly Instructions

We address the problem of formally verifying arithmetic instructions of microprocessors implemented by microprograms that contain loops. We try to avoid theorem proving techniques using a new symbolic representation: Binary Moment Diagrams (*BMDs). In order to use *BMDs for verifying sequential circuits as well as micro-programs, we extend this representation and deene several bit-vector level operators. This extension is then integrated into an automatic veriication system. We illustrate the paper with examples and we discuss power and weakness of *BMDs.